| Logic synthesis meets machine learning: Trading exactness for generalization S Rai, WL Neto, Y Miyasaka, X Zhang, M Yu, Q Yi, M Fujita, GB Manske, ... 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 35* | 2021 |
| CPA-DF: A Tool for Configurable Interval Analysis to Boost Program Verification D Beyer, PC Chien, NZ Lee 2023 38th IEEE/ACM International Conference on Automated Software …, 2023 | 4 | 2023 |
| Bridging Hardware and Software Analysis with Btor2C: A Word-Level-Circuit-to-C Translator D Beyer, PC Chien, NZ Lee International Conference on Tools and Algorithms for the Construction and …, 2023 | 4 | 2023 |
| CPAchecker 2.3 with Strategy Selection: (Competition Contribution) D Baier, D Beyer, PC Chien, M Jankola, M Kettl, NZ Lee, T Lemberger, ... International Conference on Tools and Algorithms for the Construction and …, 2024 | 3 | 2024 |
| Time-frame folding: Back to the sequentiality PC Chien, JHR Jiang 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019 | 2 | 2019 |
| CPV: A Circuit-Based Program Verifier PC Chien, NZ Lee International Conference on Tools and Algorithms for the Construction and …, 2024 | 1 | 2024 |
| Augmenting Interpolation-Based Model Checking with Auxiliary Invariants D Beyer, PC Chien, NZ Lee Proc. SPIN, 2024 | 1 | 2024 |
| Btor2-Cert: A Certifying Hardware-Verification Framework Using Software Analyzers Z Ádám, D Beyer, PC Chien, NZ Lee, N Sirrenberg International Conference on Tools and Algorithms for the Construction and …, 2024 | | 2024 |
| Augmenting Interpolation-Based Model Checking with Auxiliary Invariants (Extended Version) D Beyer, PC Chien, NZ Lee arXiv preprint arXiv:2403.07821, 2024 | | 2024 |
| Compatible Equivalence Checking of X-Valued Circuits YN Wang, YR Luo, PC Chien, PL Wang, HR Wang, WH Lin, JHR Jiang, ... 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | | 2021 |
| Time multiplexing via circuit folding PC Chien, JHR Jiang 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | | 2020 |
| Circuit Folding: From Combinational to Sequential Circuits PC Chien National Taiwan University, 2020 | | 2020 |
Nian-Ze LeeLMU MunichVerified email at sosy.ifi.lmu.de
