| Energy efficient adiabatic logic for low power vlsi applications AK Maurya, G Kumar 2011 International Conference on Communication Systems and Network …, 2011 | 26 | 2011 |
| Adiabatic logic: Energy efficient technique for VLSI applications AK Maurya, G Kumar 2011 2nd International Conference on Computer and Communication Technology …, 2011 | 22 | 2011 |
| Simulation studies for refurbishment and uprating of hydro power plants OP Rahi, G Kumar 2014 IEEE PES General Meeting| Conference & Exposition, 1-5, 2014 | 15 | 2014 |
| Implementation of barrel shifter using diode free adiabatic logic (DFAL) K Srinivasarao, G Kumar 2014 International Conference on Green Computing Communication and …, 2014 | 6 | 2014 |
| CMOS limitations and futuristic carbon allotropes G Kumar, S Agrawal 2017 8th IEEE Annual Information Technology, Electronics and Mobile …, 2017 | 5 | 2017 |
| Analysis of performance of 3T1D dynamic random-access memory cell N Chhunid, G Kumar International Journal of Electronics and Communication Engineering 10 (7 …, 2016 | 4 | 2016 |
| Ant lion optimizer for suppression of ambipolar conduction in schottky barrier carbon nanotube field effect transistors G Kumar, S Agrawal Silicon, 1-9, 2021 | 2 | 2021 |
| Signal resampling technique combining level crossing and auditory features Nagesha, GH Kumar Pattern Recognition and Machine Intelligence: Second International …, 2007 | 2 | 2007 |
| Suppression of ambipolar current in enhanced gate based schottky barrier cntfet using ant lion optimization G Kumar, S Agrawal Silicon 14 (17), 11531-11537, 2022 | 1 | 2022 |
| Weight functions for signal reconstruction based on level crossings GH Kumar International Journal of Electronics and Communication Engineering 3 (11 …, 2009 | | 2009 |
| Research Scholar, Electronics and Communication Engineering Department, UIET, Panjab University Chandigarh, India gagnesh78@ gmail. com G Kumar | | |
