| A new chaotic key-based design for image encryption and decryption JI Guo 2000 IEEE international symposium on circuits and systems (ISCAS) 4, 49-52, 2000 | 443 | 2000 |
| A new image encryption algorithm and its VLSI architecture JC Yen, JI Guo 1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and …, 1999 | 259* | 1999 |
| Efficient hierarchical chaotic image encryption algorithm and its VLSI realisation JC Yen, JI Guo IEE Proceedings-vision, image and signal processing 147 (2), 167-175, 2000 | 166 | 2000 |
| The efficient memory-based VLSI array designs for DFT and DCT JI Guo, CM Liu, CW Jen IEEE Transactions on Circuits and Systems II-Analog and Digital Signal …, 1992 | 137 | 1992 |
| A novel low-cost high-performance VLSI architecture for MPEG-4 AVC/H. 264 CAVLC decoding HC Chang, CC Lin, JI Guo 2005 IEEE International Symposium on Circuits and Systems (ISCAS), 6110-6113, 2005 | 124 | 2005 |
| A 160K gates/4.5 KB SRAM H. 264 video decoder for HDTV applications CC Lin, JW Chen, HC Chang, YC Yang, YHO Yang, MC Tsai, JI Guo, ... IEEE Journal of Solid-State Circuits 42 (1), 170-182, 2006 | 118 | 2006 |
| A memory-efficient realization of cyclic convolution and its application to discrete cosine transform HC Chen, JI Guo, TS Chang, CW Jen IEEE transactions on Circuits and Systems for Video Technology 15 (3), 445-453, 2005 | 84 | 2005 |
| A high-performance direct 2-D transform coding IP design for MPEG-4AVC/H. 264 KH Chen, JI Guo, JS Wang IEEE transactions on circuits and systems for video technology 16 (4), 472-483, 2006 | 80 | 2006 |
| A new array architecture for prime-length discrete cosine transform JI Guo, CM Liu, CW Jen IEEE Transactions on Signal Processing 41 (1), 1993 | 77 | 1993 |
| A new k-winners-take-all neural network and its array architecture JC Yen, JI Guo, HC Chen IEEE Transactions on Neural networks 9 (5), 901-912, 1998 | 71 | 1998 |
| A new chaotic image encryption algorithm JC Yen, JI Guo Proc.(Taiwan) National Symposium on Telecommunications, 358-362, 1998 | 65 | 1998 |
| A high performance CAVLC encoder design for MPEG-4 AVC/H. 264 video coding applications CD Chien, KP Lu, YH Shih, JI Guo 2006 IEEE International Symposium on Circuits and Systems (ISCAS), 4 pp.-3841, 2006 | 62 | 2006 |
| H. 264/AVC intra coding algorithms having quality scalability JI Guo, JW Chen, CH Chang US Patent App. 11/812,247, 2008 | 60 | 2008 |
| A 252kgate/71mW multi-standard multi-channel video decoder for high definition video applications CD Chien, CC Lin, YH Shih, HC Chen, CJ Huang, CY Yu, CL Chen, ... 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 60 | 2007 |
| A 7mw-to-183mw dynamic quality-scalable h. 264 video encoder chip HC Chang, JW Chen, CL Su, YC Yang, Y Li, CH Chang, ZM Chen, ... 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 60 | 2007 |
| Design and realization of a new signal security system for multimedia data transmission HC Chen, JI Guo, LC Huang, JC Yen EURASIP Journal on Advances in Signal Processing 2003, 1-15, 2003 | 59 | 2003 |
| An efficient 2-D DCT/IDCT core design using cyclic convolution and adder-based realization JI Guo, RC Ju, JW Chen IEEE Transactions on Circuits and Systems for Video Technology 14 (4), 416-428, 2004 | 54 | 2004 |
| Parallel adder-based DCT/IDCT design using cyclic convolution JI Guo, KW Liu US Patent 6,871,208, 2005 | 51 | 2005 |
| Design of a new signal security system JC Yen, JI Guo 2002 IEEE International Symposium on Circuits and Systems (ISCAS) 4, IV-IV, 2002 | 47 | 2002 |
| Hardware-efficient DFT designs with cyclic convolution and subexpression sharing TS Chang, JI Guo, CW Jen IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2000 | 47 | 2000 |
