追蹤
Joel Barnett
Joel Barnett
Tokyo Electron
在 us.tel.com 的電子郵件地址已通過驗證
標題
引用次數
引用次數
年份
The effect of interfacial layer properties on the performance of Hf-based gate stack devices
G Bersuker, CS Park, J Barnett, PS Lysaght, PD Kirsch, CD Young, ...
Journal of Applied Physics 100 (9), 2006
1932006
Nucleation and growth study of atomic layer deposited HfO2 gate dielectrics resulting in improved scaling and electron mobility
PD Kirsch, MA Quevedo-Lopez, HJ Li, Y Senzaki, JJ Peterson, SC Song, ...
Journal of applied physics 99 (2), 2006
1442006
High-k gate stacks for planar, scaled CMOS integrated circuits
HR Huff, A Hou, C Lim, Y Kim, J Barnett, G Bersuker, GA Brown, ...
Microelectronic Engineering 69 (2-4), 152-167, 2003
1272003
Imaging local electronic corrugations and doped regions in graphene
BJ Schultz, CJ Patridge, V Lee, C Jaye, PS Lysaght, C Smith, J Barnett, ...
Nature communications 2 (1), 372, 2011
1202011
Conventional n-channel MOSFET devices using single layer HfO/sub 2/and ZrO/sub 2/as high-k gate dielectrics with polysilicon gate electrode
Y Kim, G Gebara, M Freiler, J Barnett, D Riley, J Chen, K Torres, JE Lim, ...
International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224 …, 2001
942001
Interfacial layer-induced mobility degradation in high-k transistors
G Bersuker, J Barnett, N Moumen, B Foran, CD Young, P Lysaght, ...
Japanese journal of applied physics 43 (11S), 7899, 2004
932004
Intrinsic characteristics of high-k devices and implications of fast transient charging effects (FTCE)
BH Lee, CD Young, R Choi, JH Sim, G Bersuker, CY Kang, R Harris, ...
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004
842004
Electron trap generation in high-/spl kappa/gate stacks by constant voltage stress
CD Young, D Heh, SV Nadkarni, R Choi, JJ Peterson, J Barnett, BH Lee, ...
IEEE Transactions on Device and Materials Reliability 6 (2), 123-131, 2006
832006
Chemical analysis of HfO2/ Si (100) film systems exposed to NH3 thermal processing
PS Lysaght, J Barnett, GI Bersuker, JC Woicik, DA Fischer, B Foran, ...
Journal of applied physics 101 (2), 2007
772007
300mm FinFET results utilizing conformal, damage free, ultra shallow junctions (Xj∼5nm) formed with molecular monolayer doping technique
KW Ang, J Barnett, WY Loh, J Huang, BG Min, PY Hung, I Ok, JH Yum, ...
2011 International Electron Devices Meeting, 35.5. 1-35.5. 4, 2011
702011
Band-Engineered Low PMOS VT with High-K/Metal Gates Featured in a Dual Channel CMOS Integration Scheme
HR Harris, P Kalra, P Majhi, M Hussain, D Kelly, J Oh, D He, C Smith, ...
2007 IEEE Symposium on VLSI Technology, 154-155, 2007
702007
Highly manufacturable 45nm LSTP CMOSFETs using novel dual high-k and dual metal gate CMOS integration
S Song, Z Zhang, M Hussain, C Huffman, J Barnett, S Bae, H Li, P Majhi, ...
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 13-14, 2006
542006
Self-aligned III-V MOSFETs heterointegrated on a 200 mm Si substrate using an industry standard process flow
RJW Hill, C Park, J Barnett, J Price, J Huang, N Goel, WY Loh, J Oh, ...
2010 International Electron Devices Meeting, 6.2. 1-6.2. 4, 2010
492010
Integration of dual metal gate CMOS on high-k dielectrics utilizing a metal wet etch process
Z Zhang, SC Song, C Huffman, MM Hussain, J Barnett, N Moumen, ...
Electrochemical and Solid-State Letters 8 (10), G271, 2005
492005
Oxygen diffusion and reactions in Hf-based dielectrics
LV Goncharova, M Dalponte, DG Starodub, T Gustafsson, E Garfunkel, ...
Applied Physics Letters 89 (4), 2006
442006
Characterization of advanced gate stacks for Si CMOS by electron energy-loss spectroscopy in scanning transmission electron microscopy
B Foran, J Barnett, PS Lysaght, MP Agustin, S Stemmer
Journal of electron spectroscopy and related phenomena 143 (2-3), 149-158, 2005
392005
Integration of dual metal gate CMOS with TaSiN (NMOS) and Ru (PMOS) gate electrodes on HfO/sub 2/gate dielectric
ZB Zhang, SC Song, C Huffman, J Barnett, N Moumen, H Alshareef, ...
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005., 50-51, 2005
352005
Subnanometer scaling of HfO2/metal electrode gate stacks
JJ Peterson, CD Young, J Barnett, S Gopalan, J Gutt, CH Lee, HJ Li, ...
Electrochemical and solid-state letters 7 (8), G164, 2004
332004
Metal wet etch process development for dual metal gate CMOS
MM Hussain, N Moumen, J Barnett, J Saulters, D Baker, Z Zhang
Electrochemical and Solid-State Letters 8 (12), G333, 2005
322005
Bulk and Interface effects on voltage linearity of ZrO2–SiO2 multilayered metal-insulator-metal capacitors for analog mixed-signal applications
SD Park, C Park, DC Gilmer, HK Park, CY Kang, KY Lim, C Burham, ...
Applied Physics Letters 95 (2), 2009
312009
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