ASSURE: RTL locking against an untrusted foundry C Pilato, AB Chowdhury, D Sciuto, S Garg, R Karri IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (7 …, 2021 | 64 | 2021 |
VeriFuzz: Program aware fuzzing AB Chowdhury, RK Medicherla, R Venkatesh International Conference on Tools and Algorithms for the Construction and …, 2019 | 55* | 2019 |
Openabc-d: A large-scale dataset for machine learning guided integrated circuit synthesis AB Chowdhury, B Tan, R Karri, S Garg arXiv preprint arXiv:2110.11292, 2021 | 36 | 2021 |
Fortifying RTL locking against oracle-less (untrusted foundry) and oracle-guided attacks N Limaye, AB Chowdhury, C Pilato, MTM Nabeel, O Sinanoglu, S Garg, ... 2021 58th ACM/IEEE Design Automation Conference (DAC), 91-96, 2021 | 30 | 2021 |
Make every move count: Llm-based high-quality rtl code generation using mcts M DeLorenzo, AB Chowdhury, V Gohil, S Thakur, R Karri, S Garg, ... arXiv preprint arXiv:2402.03289, 2024 | 26 | 2024 |
VeriAbs: Verification by Abstraction and Test Generation: (Competition Contribution) P Darke, S Prabhu, B Chimdyalwar, A Chauhan, S Kumar, ... Tools and Algorithms for the Construction and Analysis of Systems: 24th …, 2018 | 21 | 2018 |
Adversarially Robust Learning via Entropic Regularization G Jagatap, A Joshi, AB Chowdhury, S Garg, C Hegde Frontiers in artificial intelligence 4, 780843, 2022 | 18 | 2022 |
Bulls-Eye: Active few-shot learning guided logic synthesis AB Chowdhury, B Tan, R Carey, T Jain, R Karri, S Garg IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 16 | 2022 |
Robust deep learning for ic test problems AB Chowdhury, B Tan, S Garg, R Karri IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 16 | 2021 |
Special session: Machine learning for semiconductor test and reliability H Amrouch, AB Chowdhury, W Jin, R Karri, F Khorrami, P Krishnamurthy, ... 2021 IEEE 39th VLSI Test Symposium (VTS), 1-11, 2021 | 12 | 2021 |
Almost: Adversarial learning to mitigate oracle-less ml attacks via synthesis tuning AB Chowdhury, L Alrahis, L Collini, J Knechtel, R Karri, S Garg, ... 2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023 | 8 | 2023 |
Explaining and interpreting machine learning CAD decisions: An IC testing case study P Krishnamurthy, A Basak Chowdhury, B Tan, F Khorrami, R Karri Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD, 129-134, 2020 | 8 | 2020 |
Retrieval-Guided Reinforcement Learning for Boolean Circuit Minimization AB Chowdhury, M Romanelli, B Tan, R Karri, S Garg arXiv preprint arXiv:2401.12205, 2024 | 4 | 2024 |
Fuzzing+ Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Postquantum Signature Schemes AB Chowdhury, A Mahapatra, D Soni, R Karri IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 3 | 2022 |
Fault Coverage of a Test Set on Structure-Preserving Siblings of a Circuit-Under-Test MN Mondal, A Basak Chowdhury, M Pradhan, S Sur-Kolay, ... IEEE 28th Asian Test Symposium (ATS), 2019 | 3 | 2019 |
VeriFuzz: program aware fuzzing A Basak Chowdhury, RK Medicherla International Conference on Tools and Algorithms for the Construction and …, 2019 | 3 | 2019 |
Towards the Imagenets of ML4EDA AB Chowdhury, S Thakur, H Pearce, R Karri, S Garg 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-7, 2023 | 2 | 2023 |
Invictus: Optimizing boolean logic circuit synthesis via synergistic learning and search AB Chowdhury, M Romanelli, B Tan, R Karri, S Garg arXiv preprint arXiv:2305.13164, 2023 | 2 | 2023 |
Too Big to Fail? Active Few-Shot Learning Guided Logic Synthesis AB Chowdhury, B Tan, R Carey, T Jain, R Karri, S Garg arXiv preprint arXiv:2204.02368, 2022 | 2 | 2022 |
ConVERTS: contrastively learning structurally invariant netlist representations AB Chowdhury, J Bhandari, L Collini, R Karri, B Tan, S Garg 2023 ACM/IEEE 5th Workshop on Machine Learning for CAD (MLCAD), 1-6, 2023 | 1 | 2023 |