| Sub-60 mV/dec ferroelectric HZO MoS2negative capacitance field-effect transistor with internal metal gate: The role of parasitic capacitance M Si, C Jiang, CJ Su, YT Tang, L Yang, W Chung, MA Alam, PD Ye 2017 IEEE International Electron Devices Meeting (IEDM), 23.5. 1-23.5. 4, 2017 | 62 | 2017 |
| TSV-free FinFET-based Monolithic 3D+-IC with computing-in-memory SRAM cell for intelligent IoT devices FK Hsueh, HY Chiu, CH Shen, JM Shieh, YT Tang, CC Yang, HC Chen, ... 2017 IEEE International Electron Devices Meeting (IEDM), 12.6. 1-12.6. 4, 2017 | 39 | 2017 |
| Investigation of strain‐induced phase transformation in ferroelectric transistor using metal‐nitride gate electrode YC Chiu, CH Cheng, CY Chang, YT Tang, MC Chen physica status solidi (RRL)–Rapid Research Letters 11 (3), 1600368, 2017 | 36 | 2017 |
| Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrOx on specific interfacial layers exhibiting 65% S.S. reduction and improved ION CJ Su, YT Tang, YC Tsou, PJ Sung, FJ Hou, CJ Wang, ST Chung, ... 2017 Symposium on VLSI Technology, T152-T153, 2017 | 29 | 2017 |
| Ge nanowire FETs with HfZrOx ferroelectric gate stack exhibiting SS of sub-60 mV/dec and biasing effects on ferroelectric reliability CJ Su, TC Hong, YC Tsou, FJ Hou, PJ Sung, MS Yeh, CC Wan, KH Kao, ... 2017 IEEE International Electron Devices Meeting (IEDM), 15.4. 1-15.4. 4, 2017 | 25 | 2017 |
| 3D Scalable, Wake-up Free, and Highly Reliable FRAM Technology with Stress-Engineered HfZrOx YD Lin, HY Lee, YT Tang, PC Yeh, HY Yang, PS Yeh, CY Wang, JW Su, ... 2019 IEEE International Electron Devices Meeting (IEDM), 15.3. 1-15.3. 4, 2019 | 24 | 2019 |
| One-transistor ferroelectric versatile memory: Strained-gate engineering for realizing energy-efficient switching and fast negative-capacitance operation YC Chiu, CH Cheng, CY Chang, YT Tang, MC Chen 2016 IEEE Symposium on VLSI Technology, 1-2, 2016 | 23 | 2016 |
| A Comprehensive Study of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Layer Effects on Negative Capacitance FETs for Sub-5 nm Node YT Tang, CJ Su, YS Wang, KH Kao, TL Wu, PJ Sung, FJ Hou, CJ Wang, ... 2018 Symposium on VLSI Technology, 45-46, 2018 | 18 | 2018 |
| van der Waals epitaxy of 2D h-AlN on TMDs by atomic layer deposition at 250 °C CH Shu-Jui Chang,Shin-Yuan Wang,Yu-Che Huang,Jia Hao Chih,Yu-Ting Lai,Yi-Wei ... Applied Physics Letters, 162102, 2022 | 16 | 2022 |
| Visualizing Ferroelectric Uniformity of Hf1–x Zr x O2 Films Using X-ray Mapping SJ Chang, CY Teng, YJ Lin, TM Wu, MH Lee, BH Lin, MT Tang, TS Wu, ... ACS Applied Materials & Interfaces 13 (24), 29212–29221, 2021 | 13 | 2021 |
| A Comprehensive Kinetical Modeling of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Energy Effects on Negative Capacitance FETs YT Tang, CL Fan, YC Kao, N Modolo, CJ Su, TL Wu, KH Kao, PJ Wu, ... 2019 Symposium on VLSI Technology, 2019 | 12 | 2019 |
| NLS based modeling and characterization of switching dynamics for antiferroelectric/ferroelectric hafnium zirconium oxides YC Chen, KY Hsiang, YT Tang, MH Lee, P Su 2021 IEEE International Electron Devices Meeting (IEDM), 15.4. 1-15.4. 4, 2021 | 10 | 2021 |
| Improving Edge Dead Domain and Endurance in Scaled HfZrOx FeRAM YD Lin, PC Yeh, YT Tang, JW Su, HY Yang, YH Chen, CP Lin, PS Yeh, ... 2021 IEEE International Electron Devices Meeting (IEDM), 6.4. 1-6.4. 4, 2021 | 10 | 2021 |
| Self-organized pairs of Ge double quantum dots with tunable sizes and spacings enable room-temperature operation of qubit and single-electron devices KP Peng, CL Chen, YT Tang, D Kuo, T George, HC Lin, PW Li 2019 IEEE International Electron Devices Meeting (IEDM), 37.4. 1-37.4. 4, 2019 | 8 | 2019 |
| Superlattice HfO 2-ZrO 2 based Ferro-Stack HfZrO 2 FeFETs: Homogeneous-Domain Merits Ultra-Low Error, Low Programming Voltage 4 V and Robust Endurance 10 9 cycles for Multibit NVM CY Liao, ZF Lou, CY Lin, A Senapati, R Karmakar, KY Hsiang, ZX Li, ... 2022 International Electron Devices Meeting (IEDM), 36.6. 1-36.6. 4, 2022 | 6 | 2022 |
| Highly Reliable, Scalable, and High-Yield HfZrOx FRAM by Barrier Layer Engineering and Post-Metal Annealing YD Lin, PC Yeh, JY Dai, JW Su, HH Huang, CY Cho, YT Tang, TH Hou, ... 2022 International Electron Devices Meeting (IEDM), 32.1. 1-32.1. 4, 2022 | 5 | 2022 |
| A numerical study of Si-TMD contact with n/p type operation and interface barrier reduction for sub-5 nm monolayer MoS2FET YT Tang, KS Li, LJ Li, MY Li, CH Lin, YJ Chen, CC Chen, CJ Su, BW Wu, ... 2016 IEEE International Electron Devices Meeting (IEDM), 14.3. 1-14.3. 4, 2016 | 5 | 2016 |
| NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFE to Break Great Memory Wall with 10 ns of PGM-pulse, 1010 Cycles of Endurance, and Decade … ER Hsieh, JK Chang, TY Tang, YJ Li, CW Liang, MY Lin, SY Huang, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 3 | 2022 |
| Characterization of Double HfZrO2 based FeFET toward Low-Voltage Multi-Level Operation for High Density Nonvolatile Memory ZF Lou, CY Liao, KY Hsiang, CY Lin, YD Lin, PC Yeh, CY Wang, HY Yang, ... 2022 International Symposium on VLSI Technology, Systems and Applications …, 2022 | 2 | 2022 |
| The First Embedded 14nm FeFinFET NVM: 2T1CFE Array as Electrical Synapses and Activations for High-performance and Low-power Inference Accelerators ER Hsieh, WL Tsai, YL Lin, CH Liu, SS Chung, YT Tang, JR Su, TP Chen, ... 2021 Symposium on VLSI Technology, 1-2, 2021 | 2 | 2021 |
Chun-Hu ChengNational Taiwan Normal University在 ntnu.edu.tw 的電子郵件地址已通過驗證
