Vivienne Sze

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Joel EmerProfessor of the Practice, MIT - Sr. Distinguished Research Scientist, NvidiaVerified email at csail.mit.edu
Yu-Hsin ChenLead AI Architect at EnCharge AIVerified email at enchargeai.com
Tien-Ju YangMassachusetts Institute of TechnologyVerified email at mit.edu
Anantha ChandrakasanDean of Engineering, Massachusetts Institute of TechnologyVerified email at mit.edu
Sertac KaramanProfessor of Aeronautics and Astronautics, Massachusetts Institute of TechnologyVerified email at mit.edu
Zhengdong ZhangResearch Scientist, Google BrainVerified email at csail.mit.edu
Amr SuleimanResearch Scientist, MetaVerified email at fb.com
Yannan Nellie WuGoogleVerified email at google.com
Tushar KrishnaAssociate Professor, Georgia TechVerified email at ece.gatech.edu
Mahmut Ersin SinangilNvidiaVerified email at alum.mit.edu
Gary J. SullivanDirector of Video Research & Standardization, Dolby LaboratoriesVerified email at ieee.org
Mehul TikekarMassachusetts Institute of TechnologyVerified email at mit.edu
Luca CarloneAssociate Professor, Massachusetts Institute of TechnologyVerified email at mit.edu
Thomas HeldtMassachusetts Institute of TechnologyVerified email at mit.edu
Hsin-Yu LaiHarvard UniversityVerified email at fas.harvard.edu
Soumya SudhakarMassachusetts Institute of TechnologyVerified email at mit.edu
James NorakyMITVerified email at mit.edu
Fangchang MaApple; MITVerified email at apple.com
Diana WofkIntel LabsVerified email at intel.com
Dirk EnglundProfessor of Electrical Engineering and Computer Science, MITVerified email at mit.edu

Vivienne Sze

Professor, EECS at MIT

Verified email at mit.edu - Homepage

VLSI Low-Power Design Machine Learning Robotics Video Coding


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Efficient Processing of Deep Neural Networks: A Tutorial and Survey V Sze, YH Chen, TJ Yang, J Emer Proceedings of the IEEE 105 (12), 2295-2329, 2017	4488	2017
Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks YH Chen, T Krishna, J Emer, V Sze 2016 IEEE International Solid-State Circuits Conference (ISSCC), 262-263, 2016	3948	2016
Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks YH Chen, J Emer, V Sze International Symposium on Computer Architecture (ISCA), 2016	1974	2016
Eyeriss v2: A Flexible Accelerator for Emerging Deep Neural Networks on Mobile Devices YH Chen, TJ Yang, J Emer, V Sze IEEE Journal on Emerging and Selected Topics in Circuits and Systems 9 (2 …, 2019	1205*	2019
Designing Energy-Efficient Convolutional Neural Networks Using Energy-Aware Pruning TJ Yang, YH Chen, V Sze Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2017	1046	2017
High Efficiency Video Coding (HEVC): Algorithms and Architectures V Sze, M Budagavi, GJ Sullivan Springer, 2014	870*	2014
NetAdapt: Platform-Aware Neural Network Adaptation for Mobile Applications TJ Yang, A Howard, B Chen, X Zhang, A Go, M Sandler, V Sze, H Adam European Conference on Computer Vision (ECCV), 2018	732	2018
Hardware for Machine Learning: Challenges and Opportunities V Sze, YH Chen, J Emer, A Suleiman, Z Zhang Custom Integrated Circuits Conference (CICC), 2017 IEEE, 1-8, 2017	479	2017
FastDepth: Fast Monocular Depth Estimation on Embedded Systems D Wofk, F Ma, TJ Yang, S Karaman, V Sze IEEE International Conference on Robotics and Automation (ICRA), 2019	373	2019
High Throughput CABAC Entropy Coding in HEVC V Sze, M Budagavi IEEE Transactions on Circuits and Systems for Video Technology 22 (12), 1778 …, 2012	351	2012
Efficient Processing of Deep Neural Networks V Sze, YH Chen, TJ Yang, JS Emer Morgan & Claypool Publishers, 2020	298*	2020
Using Dataflow to Optimize Energy Efficiency of Deep Neural Network Accelerators YH Chen, J Emer, V Sze IEEE Micro’s Top Picks from the Computer Architecture Conferences 37 (3), 2017	270	2017
A Method to Estimate the Energy Consumption of Deep Neural Networks TJ Yang, YH Chen, J Emer, V Sze Asilomar Conference on Signals, Systems and Computers, 2017	268	2017
Accelergy: An Architecture-Level Energy Estimation Methodology for Accelerator Designs YN Wu, J Emer, V Sze International Conference on Computer-Aided Design (ICCAD), 2019	251	2019
Core Transform Design in the High Efficiency Video Coding (HEVC) Standard M Budagavi, A Fuldseth, G Bjontegaard, V Sze, M Sadafale IEEE Journal of Selected Topics in Signal Processing 7 (6), 1029-1041, 2013	240	2013
Parallel motion estimation in video coding US Patent 20,120,257,678, 2015	232*	2015
DeeperLab: Single-Shot Image Parser TJ Yang, MD Collins, Y Zhu, JJ Hwang, T Liu, X Zhang, V Sze, ... arXiv preprint arXiv:1902.05093, 2019	218	2019
Navion: A Fully Integrated Energy-Efficient Visual-Inertial Odometry Accelerator for Autonomous Navigation of Nano Drones A Suleiman, Z Zhang, L Carlone, S Karaman, V Sze IEEE Symposium on VLSI Circuits (VLSI-Circuits), 2018	202*	2018
Hardware architectures for deep neural networks J Emer, V Sze, YH Chen, TJ Yang CICS/MTL Tutorial, 2017	171*	2017
Technologies for Ultradynamic Voltage Scaling AP Chandrakasan, DC Daly, DF Finchelstein, J Kwong, YK Ramadass, ... Proceedings of the IEEE 98 (2), 191-214, 2010	142	2010

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