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Zhifeng Lin
Zhifeng Lin
Verified email at fzu.edu.cn
Title
Cited by
Cited by
Year
Mixed-Cell-Height Placement With Complex Minimum-Implant-Area Constraints
J Chen, Z Lin, Y Xie, W Zhu, YW Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022
222022
Clock-aware placement for large-scale heterogeneous FPGAs
J Chen, Z Lin, YC Kuo, CC Huang, YW Chang, SC Chen, CH Chiang, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
222020
An improved simulated annealing algorithm with excessive length penalty for fixed-outline floorplanning
Z Huang, Z Lin, Z Zhu, J Chen
IEEE Access 8, 50911-50920, 2020
182020
Time-division multiplexing based system-level FPGA routing for logic verification
P Zou, Z Lin, X Shi, Y Wu, J Chen, J Yu, YW Chang
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
82020
Incremental 3d global routing considering cell movement and complex routing constraints
P Zou, Z Cai, Z Lin, C Ma, J Yu, J Chen
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022
52022
Late breaking results: An analytical timing-driven placer for heterogeneous FPGAs
Z Lin, Y Xie, G Qian, S Wang, J Yu, J Chen
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-2, 2020
5*2020
Late Breaking Results: Incremental 3D global routing considering cell movement
P Zou, Z Lin, C Ma, J Yu, J Chen
2021 58th ACM/IEEE Design Automation Conference (DAC), 1366-1367, 2021
42021
An Incremental Placement Flow for Advanced FPGAs With Timing Awareness
Z Lin, Y Xie, P Zou, S Wang, J Yu, J Chen
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021
42021
Timing-driven placement for fpgas with heterogeneous architectures and clock constraints
Z Lin, Y Xie, G Qian, J Chen, S Wang, J Yu, YW Chang
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021
42021
Research on event-related potentials in motor imagery BCI
Z Lin, Z Huang
2017 10th International Congress on Image and Signal Processing, BioMedical …, 2017
12017
Network-Architecture-Aware Multiplexer Decomposition for Technology Mapping
Y Chen, Z Lin, X Liang, Z Cai, X Bai, J Chen
IEEE Transactions on Circuits and Systems II: Express Briefs, 2024
2024
High-correlation 3D routability estimation for congestion-guided global routing
Y Chen, M Su, H Ding, S Weng, Z Lin, X Bai
The Journal of Supercomputing 80 (3), 3114-3141, 2024
2024
OO: Optimized One-die Placement for Face-to-face Bonded 3D ICs
X Tong, Z Cai, P Zou, M Wei, Y Wen, Z Lin, J Chen
2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 71-76, 2024
2024
An Analytical Placement Algorithm with Routing topology Optimization
M Wei, X Tong, Z Cai, P Zou, Z Lin, J Chen
2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 294-299, 2024
2024
Effective Analytical Placement for Advanced Hybrid-Row-Height Circuit Designs
Y Wen, B Zhu, Z Lin, J Chen
2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 300-305, 2024
2024
Legalized Routing Algorithm Based on Linear Programming
C Chen, X Tong, Q Liu, J Chen, Z Lin
Electronics 12 (20), 4338, 2023
2023
Toward Optimal Filler Cell Insertion with Complex Implant Layer Constraints
P Zou, G Chen, Z Lin, J Yu, J Chen
2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023
2023
Hotspot Detection with Machine Learning Based on Pixel-Based Feature Extraction
Z Lin, Z Gu, Z Huang, X Bai, L Luo, G Lin
Scientific Programming 2022, 2022
2022
Recognition of ErrP in P300 Speller Based on Time Series Pattern
Z Lin, Z Huang
2018 11th International Congress on Image and Signal Processing, BioMedical …, 2018
2018
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Articles 1–19