追蹤
Chun-Cheng (Jason) Liu
Chun-Cheng (Jason) Liu
Principal Engineer, NVIDIA
在 nvidia.com 的電子郵件地址已通過驗證
標題
引用次數
引用次數
年份
A 10-bit 50-MS/s SAR ADC with a monotonic capacitor switching procedure
CC Liu, SJ Chang, GY Huang, YZ Lin
IEEE Journal of Solid-State Circuits 45 (4), 731-740, 2010
14272010
A 10b 100MS/s 1.13 mW SAR ADC with binary-scaled error compensation
CC Liu, SJ Chang, GY Huang, YZ Lin, CM Huang, CH Huang, L Bu, ...
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 386-387, 2010
3652010
A 0.92 mW 10-bit 50-MS/s SAR ADC in 0.13 μm CMOS process
CC Liu, SJ Chang, GY Huang, YZ Lin
2009 Symposium on VLSI Circuits, 236-237, 2009
1852009
A 1-µW 10-bit 200-kS/s SAR ADC with a bypass window for biomedical applications
GY Huang, SJ Chang, CC Liu, YZ Lin
IEEE Journal of Solid-State Circuits 47 (11), 2783-2795, 2012
1792012
A 1V 11fJ/conversion-step 10bit 10MS/s asynchronous SAR ADC in 0.18 µm CMOS
CC Liu, SJ Chang, GY Huang, YZ Lin, CM Huang
2010 Symposium on VLSI Circuits, 241-242, 2010
1722010
A 10 bit 320 MS/s low-cost SAR ADC for IEEE 802.11 ac applications in 20 nm CMOS
CC Liu, CH Kuo, YZ Lin
IEEE Journal of Solid-State Circuits 50 (11), 2645-2654, 2015
1552015
28.1 A 0.46 mW 5MHz-BW 79.7 dB-SNDR noise-shaping SAR ADC with dynamic-amplifier-based FIR-IIR filter
CC Liu, MC Huang
2017 IEEE International Solid-State Circuits Conference (ISSCC), 466-467, 2017
1412017
10-bit 30-MS/s SAR ADC using a switchback switching method
GY Huang, SJ Chang, CC Liu, YZ Lin
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (3), 584-588, 2012
1182012
A 12 bit 100 MS/s SAR-Assisted Digital-Slope ADC
CC Liu, MC Huang, YH Tu
IEEE Journal of Solid-State Circuits 51 (12), 2941-2950, 2016
962016
A 9-bit 150-MS/s subrange ADC based on SAR architecture in 90-nm CMOS
YZ Lin, CC Liu, GY Huang, YT Shyu, YT Liu, SJ Chang
IEEE Transactions on Circuits and Systems I: Regular Papers 60 (3), 570-581, 2013
912013
6.2 A 460mW 112Gb/s DSP-based transceiver with 38dB loss compensation for next-generation data centers in 7nm FinFET technology
T Ali, E Chen, H Park, R Yousry, YM Ying, M Abdullatif, M Gandara, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 118-120, 2020
752020
A 9-bit 150-MS/s 1.53-mW subranged SAR ADC in 90-nm CMOS
YZ Lin, CC Liu, GY Huang, YT Shyu, SJ Chang
2010 Symposium on VLSI Circuits, 243-244, 2010
722010
An asynchronous binary-search ADC architecture with a reduced comparator count
YZ Lin, SJ Chang, YT Liu, CC Liu, GY Huang
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (8), 1829-1837, 2010
712010
A 0.022 mm 98.5 dB SNDR Hybrid Audio Modulator With Digital ELD Compensation in 28 nm CMOS
TC Wang, YH Lin, CC Liu
IEEE Journal of Solid-State Circuits 50 (11), 2655-2664, 2015
562015
A 5b 800MS/s 2mW asynchronous binary-search ADC in 65nm CMOS
YZ Lin, SJ Chang, YT Liu, CC Liu, GY Huang
2009 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2009
562009
27.4 A 0.35 mW 12b 100MS/s SAR-assisted digital slope ADC in 28nm CMOS
CC Liu
2016 IEEE International Solid-State Circuits Conference (ISSCC), 462-463, 2016
512016
6.4 A 180mW 56Gb/s DSP-based transceiver for high density IOs in data center switches in 7nm FinFET technology
T Ali, R Yousry, H Park, E Chen, PS Weng, YC Huang, CC Liu, CH Wu, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 118-120, 2019
462019
A 10b 200MS/s 0.82 mW SAR ADC in 40nm CMOS
GY Huang, SJ Chang, YZ Lin, CC Liu, CP Huang
2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 289-292, 2013
422013
A 10-bit 60-MS/s low-power pipelined ADC with split-capacitor CDS technique
JF Lin, SJ Chang, CC Liu, CH Huang
IEEE Transactions on Circuits and Systems II: Express Briefs 57 (3), 163-167, 2010
372010
A 10-bit 12-MS/s successive approximation ADC with 1.2-pF input capacitance
GY Huang, CC Liu, YZ Lin, SJ Chang
2009 IEEE Asian Solid-State Circuits Conference, 157-160, 2009
332009
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