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Sanghamitra Das
Sanghamitra Das
Verified email at silicon.ac.in
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Cited by
Cited by
Year
Strain-engineering in nanowire field-effect transistors at 3 nm technology node
TP Dash, S Dey, S Das, E Mohapatra, J Jena, CK Maiti
Physica E: Low-dimensional Systems and Nanostructures 118, 113964, 2020
242020
Study of strained-Si p-channel MOSFETs with HfO2 gate dielectric
D Pradhan, S Das, TP Dash
Superlattices and Microstructures 98, 203-207, 2016
212016
Strain induced variability study in Gate-All-Around vertically-stacked horizontal nanosheet transistors
E Mohapatra, TP Dash, J Jena, S Das, CK Maiti
Physica Scripta 95 (6), 065808, 2020
192020
Reactive nitrogen species and male reproduction: Physiological and pathological aspects
S Dutta, P Sengupta, S Das, P Slama, S Roychoudhury
International Journal of Molecular Sciences 23 (18), 10574, 2022
172022
Design study of gate-all-around vertically stacked nanosheet FETs for sub-7nm nodes
E Mohapatra, TP Dash, J Jena, S Das, CK Maiti
SN Applied Sciences 3, 1-13, 2021
172021
Design and simulation of vertically-stacked nanowire transistors at 3 nm technology nodes
S Dey, J Jena, E Mohapatra, TP Dash, S Das, CK Maiti
Physica Scripta 95 (1), 014001, 2019
162019
Vertically-stacked silicon nanosheet field effect transistors at 3nm technology nodes
TP Dash, S Dey, E Mohapatra, S Das, J Jena, CK Maiti
2019 Devices for Integrated Circuit (DevIC), 99-103, 2019
152019
Stress-induced variability studies in tri-gate FinFETs with source/drain stressor at 7 nm technology nodes
TP Dash, J Jena, E Mohapatra, S Dey, S Das, CK Maiti
Journal of Electronic Materials 48 (8), 5348-5362, 2019
132019
Deposition of composition‐controlled silicon oxynitride films by dual ion beam sputtering
SK Ray, S Das, CK Maiti, SK Lahiri, NB Chakrabarti
Applied physics letters 58 (22), 2476-2478, 1991
121991
Performance comparison of strained-SiGe and bulk-Si channel FinFETs at 7 nm technology node
TP Dash, S Dey, S Das, J Jena, E Mohapatra, CK Maiti
Journal of Micromechanics and Microengineering 29 (10), 104001, 2019
102019
Performance and opportunities of gate-all-around vertically-stacked nanowire transistors at 3nm technology nodes
S Dey, TP Dash, E Mohapatra, J Jena, S Das, CK Maiti
2019 Devices for Integrated Circuit (DevIC), 94-98, 2019
102019
Electron mobility modeling in strained-Si n-MOSFETs using TCAD
TP Dash, D Pradhan, S Das, RK Nanda
2016 IEEE Annual India Conference (INDICON), 1-4, 2016
92016
Optimization of Cutting Parameters for AISI H13 Tool Steel by Taguchi Method and Artificial Neural Network
H Pathak, S Das, R Doley, S Kashyap
International Journal of Materials Forming and Machining Processes (IJMFMP …, 2015
92015
Performance Analysis of Sub-10nm Vertically Stacked Gate-All-Around FETs
E Mohapatra, TP Dash, J Jena, S Das, CK Maiti
2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 331-334, 2020
62020
Fin shape dependence of electrostatics and variability in FinFETs
J Jena, TP Dash, E Mohapatra, S Dey, S Das, CK Maiti
Journal of Electronic Materials 48 (10), 6742-6752, 2019
62019
Beyond silicon: strained-SiGe channel FinFETs
RK Nanda, TP Dash, S Das, CK Maiti
2015 International Conference on Man and Machine Interfacing (MAMI), 1-4, 2015
62015
Intimate Labor at Biomedical Frontlines: Situated Knowledges of Female Community Health Workers in the Management of COVID-19 in India
S Das, S Das
Catalyst: Feminism, Theory, Technoscience 7 (1), 2021
52021
Design and optimization of stress/strain in GAA nanosheet FETs for improved FOMs at sub-7 nm nodes
E Mohapatra, D Jena, S Das, CK Maiti, TP Dash
Physica Scripta 98 (6), 065919, 2023
42023
FinFET-Based Inverter Design and Optimization at 7 Nm Technology Node
J Jena, D Jena, E Mohapatra, S Das, TP Dash
Silicon 14 (16), 10781-10794, 2022
42022
Performance Analysis of FinFETs with Strained-Si Fin on Strain-Relaxed Buffer
J Jena, TP Dash, E Mohaptra, S Das, J Nanda, CK Maiti
2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 327-330, 2020
42020
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